Memory
MLOAD
Original EVM instruction.
Heap memory load operation is modeled with a native EraVM instruction.
LLVM IR
%value = load i256, ptr addrspace(1) %pointer, align 1
The LLVM IR generator code is common for Yul and EVMLA representations.
LLVM IR instruction documentation
EraVM Assembly
ld.1 r1, r2
MSTORE
Original EVM instruction.
Heap memory load operation is modeled with a native EraVM instruction.
LLVM IR
store i256 128, ptr addrspace(1) inttoptr (i256 64 to ptr addrspace(1)), align 1
The LLVM IR generator code is common for Yul and EVMLA representations.
LLVM IR instruction documentation
EraVM Assembly
st.1 r1, r2
MSTORE8
Original EVM instruction.
LLVM IR
define void @__mstore8(i256 addrspace(1)* nocapture nofree noundef dereferenceable(32) %addr, i256 %val) #2 {
entry:
%orig_value = load i256, i256 addrspace(1)* %addr, align 1
%orig_value_shifted_left = shl i256 %orig_value, 8
%orig_value_shifted_right = lshr i256 %orig_value_shifted_left, 8
%byte_value_shifted = shl i256 %val, 248
%store_result = or i256 %orig_value_shifted_right, %byte_value_shifted
store i256 %store_result, i256 addrspace(1)* %addr, align 1
ret void
}
The LLVM IR generator code is common for Yul and EVMLA representations.